Integrated circuit (IC) design becomes more challenging as IC technologies continually progress towards smaller feature sizes, such as 32 nanometers, 28 nanometers, 20 nanometers, and below. For example, smaller feature sizes require ever shrinking pitch (i.e., a center-to-center distance between IC features) and critical dimension (i.e., a smallest achievable dimension, such as a width, for an IC feature). Current resolution of lithography processes—an ability of the lithography processes to resolve detail in an IC feature being patterned—hinders realization of the smaller feature sizes required for advanced technology nodes. Accordingly, although existing lithography processes have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects.